ad9361

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Here are 24 public repositories matching this topic...

open-sdr / openwifi

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open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

Updated Aug 14, 2026
C

open-sdr / openwifi-hw

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open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

linux fpga zynq hls hardware vhdl rtl verilog xilinx sdr wi-fi analog-devices ieee80211 dma software-defined-radio ofdm csma ad9361 mac80211

Updated Sep 23, 2025
Verilog

MeowLucian / SDR_Matlab_OFDM_802.11a

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📡 Using Software Designed Radio to transmit OFDM QPSK signals at 5 GHz

radio gui zynq packets hardware matlab xilinx sdr zedboard ofdm qpsk preamble ad9361 ieee80211a fmcomms3 fmcomms analog-device 80211 xilinx-zynq

Updated Apr 7, 2018
MATLAB

MeowLucian / SDR_Matlab_OFDM_802.11n

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📡 Using Software Designed Radio to transmit MIMO-OFDM QPSK signals at 5 GHz

Updated Apr 2, 2018
MATLAB

analogdevicesinc / gr-iio

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IIO blocks for GNU Radio

iio gnuradio ad9361 fmcomms plutosdr adalm-pluto

Updated Jun 30, 2023
C++

analogdevicesinc / libad9361-iio

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IIO AD9361 library for filter design and handling, multi-chip sync, etc.

iio mcs fir hacktoberfest ad9361 plutosdr adalm-pluto adrv9361

Updated Jul 29, 2026
C

Grootzz / AD9361_TX_MSK

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A project demonstrate how to config ad9361 to TX mode and how to transmit MSK

fpga verilog msk ad9361

Updated May 18, 2019
Verilog

analogdevicesinc / ad936x-filter-wizard

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MATLAB-based FIR filter design

matlab filter-design ad9361

Updated Sep 6, 2024
MATLAB

vankxr / icyradio

Sponsor

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Over-engineered SDR development board

Updated Mar 26, 2026
VHDL

MeowLucian / SDR_FM_Radio

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📻 Using Software Designed Radio to transmit & receive FM signal

radio station zynq xilinx sdr simulink fm analog-devices zedboard demodulation modulation ad9361 fmcomms3 fmcomms simulink-model xilinx-zynq

Updated Apr 2, 2018
MATLAB

MeowLucian / SDR_Matlab_OFDM_802.11a_16QAM

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📡 Using Software Designed Radio to transmit OFDM 16QAM signals at 5 GHz

Updated Apr 7, 2018
MATLAB

MeowLucian / SDR_Matlab_LTE

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📡 Using Software Designed Radio to transmit LTE downlink signals at 2.4 GHz

radio gui zynq hardware matlab xilinx sdr iio analog-devices zedboard software-defined-radio ofdm ad9361 fmcomms3 fmcomms xilinx-zynq 64qam

Updated Jul 3, 2019
MATLAB

Grootzz / AD9361_TX_GMSK

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A project demonstrate how to config ad9361 to TX mode and how to transmit GMSK

verilog ad9361 gmsk

Updated Dec 9, 2018
VHDL

Grootzz / AD9361_TX_1MHz_Baseband_800Hz_IF

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A project demonstrate how to config ad9361 to TX mode

verilog ad9361

Updated Dec 9, 2018
VHDL

coach114514 / TCR-RM2026-Radar-OpenSource

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厦门大学嘉庚学院 TCR 战队 RoboMaster 2026 雷达站：地面视觉与单板无线电融合开源

computer-vision radar sdr ros2 ad9361 robomaster

Updated Aug 11, 2026
Python

rodrigo455 / AD936X_LIBIIO

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REDHAWK FrontEnd Interface for the transceivers AD9361, AD9364, AD9363

sdr iio redhawk ad9361 fmcomms plutosdr adrv9361

Updated Aug 1, 2018
C++

briansune / MLK-L1-CZ06-DR1M90G-FM-Radio

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MLK-L1-CZ06-DR1M90G FM Radio

fpga verilog hdl ad9361 fmcomms3 dr1 anlogic lvds hdmi-audio anlogic-fpga fm-ra

Updated Dec 7, 2024
Verilog

mangobanaani / cirradio

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Tactical UHF FHSS mesh radio: Zynq-7045 + AD9361, SystemVerilog RTL, C++20 comms stack, AES-256 PKCS#11 crypto

fpga zynq aes-256 sdr systemverilog uhf ad9361 fhss cpp20 mesh-networking tactical-radio transec

Updated Mar 16, 2026
Python

ddurfeeEngineer / ad9361-iiostream-loopback

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example of using iio to stream data from AD9361 with a coax cable loopback

zynq xilinx sdr iio zed analog-devices zedboard ad9361 xilinx-zynq vitis

Updated Apr 14, 2024
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Bucknalla / AD9361_ZyCAP

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PL Layer Controls for the AD9361 RF Front End

zedboard xilinx-fpga ad9361 fmcomms3

Updated Feb 8, 2018

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